Contrary to what we thought yesterday based on visual estimation of the A5X die, Chipworks has (presumably) measured the actual die itself: 162.94mm^2. While the A5 was big, this is absolutely huge for a mobile SoC. The table below puts it in perspective.

CPU Specification Comparison
CPU Manufacturing Process Cores Transistor Count Die Size
Apple A5X 45nm? 2 ? 163mm2
Apple A5 45nm 2 ? 122mm2
Intel Sandy Bridge 4C 32nm 4 995M 216mm2
Intel Sandy Bridge 2C (GT1) 32nm 2 504M 131mm2
Intel Sandy Bridge 2C (GT2) 32nm 2 624M 149mm2
NVIDIA Tegra 3 40nm 4+1 ? ~80mm2
NVIDIA Tegra 2 40nm 2 ? 49mm2
The PowerVR SGX 543MP2 in Apple's A5 takes up just under 30% of the SoC's 122mm^2 die size, or around 36.6mm^2 just for the GPU. Double the number of GPU cores as Apple did with the A5X and you're looking at a final die size of around 160mm^2, which is exactly what Chipworks came up with in their measurement.

Update: Chipworks confirmed the A5X is still built on Samsung's 45nm LP process. You can see a cross-section of the silicon above. According to Chipworks' analysis, the A5X features 9 metal layers.
Note that this is around 2x the size of NVIDIA's Tegra 3. It's no surprise Apple's GPU is faster, it's spending a lot more money than NVIDIA to deliver that performance. From what I hear, NVIDIA's Wayne SoC will finally show what the GPU company is made of. The only issue is that when Wayne shows up, a Rogue based A6 is fairly likely. The mobile GPU wars are going to get very exciting in 2013.
Image Courtesy iFixit
Thanks to @anexanhume for the tip!


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  • jjj - Friday, March 16, 2012 - link

    that shows how little you impacts perf in a big way atm. Reply
  • darkcrayon - Friday, March 16, 2012 - link

    Even on a device that does not use a swap file? Once an app is launched, which takes on average a couple of seconds, where is all this slow disk i/o that's "bottlenecking" the experience? On the other hand, I can't think of many applications on something like the iPad that aren't using the GPU for *something*. Reply
  • A5 - Friday, March 16, 2012 - link

    Pretty much this. The only apps that don't fit into RAM are the large, graphically intense games. Most day-to-day apps load within a second.

    Mobile SoCs have more of a problem with memory bandwidth than storage speed.
  • tipoo - Saturday, March 17, 2012 - link

    You can't really compare it to Ivy Bridge though, IB will be using 22nm transistors so it will have a much higher density, and even Sandy Bridge is on 32nm now while Apple is on 45nm. Heck, even Tegra is on 40nm, so Apples chips are less dense overall. Reply
  • Roland00Address - Monday, March 19, 2012 - link

    AMD Zacate/Brazos (aka Bobcat high power/Bobcat low power) die size is 75mm^2 on TSMC low powered 40mm. 40nm has about a 25% greater transistor density than 45nm (I don't have numbers of TSMC vs Samsung transistor density for 45 vs 40nm so I am assuming 1:1). So 75mm^2 *1.25= 93 is mm^2

    A6x is 162.94mm^2 or 212% the size of than AMD Zacate/Brazo 75mm^2 on TMSC 40nm, once you take in account 40 vs 45 that is about 173% the size of Zacate.
  • zanon - Friday, March 16, 2012 - link

    That still remains one of the oddest parts of Tegra 3. As pointed out in Anand's own Medfield review, current ARM cores by themselves can be very easily choked by lack of memory bandwidth (handling that much better seems to be a major part of why Medfield did so well). With the Tegra 2 it was somewhat understandable, because it was quite an early part, but at the end of 2011, with a quad-core part and updated (though still weak) GPU, it was very odd that Nvidia of all places would stay on a single-channel when everyone else had left that behind.

    Tegra 3 was pretty disappointing. I very much hope as you say here that Wayne will be a major leap forward and really blow everyone's socks off. It's definitely going to be wicked exciting in 2013, with both Series 6 on the GPU-side and big.LITTLE A15/A7 heterozygous SoCs on the CPU-side. We're still on such a strong upward curve in the mobile space, every year is bringing incredible leaps forward and massive competition. Like being back in the early/mid-90s all over again but even better :).
  • tipoo - Saturday, March 17, 2012 - link

    I've always felt like Tegra was designed for marketability over all else. Every Tegra revision was supposed to be the leader of mobile SoCs, but every time they turned out to be more hot air than performance. Quad + 1 cores is marketable; dual channel memory to actually feed the cores isn't. An 8 "core" GPU is marketable, but its handily slaughtered by a year old Imagination Tech (SGX) chip. Reply
  • Roland00Address - Monday, March 19, 2012 - link

    1) They are cheap to make since the die size is so small. When carriers don't subsidize the device, margins can be small. Apple can make their chips be bigger since A) they sell so much volume and thus they can push downward pressure on their marginal costs by buying in bulk B) They are the market leader so they can charge more for their device
    2) Tegra 2 was the Android development platform for Android 3.X thus everybody knows the software and you don't have to pay money to tweak it.

    So good marketing combine with cheap to make means you can make your money and sell the device.
  • iwod - Friday, March 16, 2012 - link

    So the next SoC in iPhone coming up in 6 months time.This definitely wont be the A5X as it simply wont fit in the iPhone size.

    A5X with 28nm die shrink? But as someone has stated above this doesn't make any sense because switching nodes requires tuning and redesign. It would be better if they simply design A6 around the new node.

    So what will A6 be? Cortex A15+A7 with Rogue? Sounds Great! But Both A7 and A15 aren't anywhere near ready in a few months time. And it would take Apple a month to stock up parts.

    Any ideas?

  • Steelbom - Saturday, March 17, 2012 - link

    I think we'll see a quad-core Cortex A15 in an iPhone, likely with 600 series graphics, and then the same in the iPad 4 but with roughly five times more powerful graphics. Reply

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