Today Intel’s CEO Pat Gelsinger has outlined two key changes to Intel policy: one derived from Intel’s plans to offer foundry services to external partners, and the other from Intel starting to outsource its core compute product families in order to get the best product at a given time. Not only is Intel set to offer x86 core IP to customers through its new Intel Foundry Services, but also Intel is looking to creating leadership compute products on external nodes. These are complete 180º turns from how Intel has previously operated.

For the last 20-25 years, Intel has been steadfast in keeping the crown jewels of its product design firmly inside its very protective walls. Over the years, Intel’s x86 designs have mostly led the market in leadership performance and power (except for Pentium 4 and Rocket Lake), and limiting use/production for Intel-only use has enabled the company to improve that design with laser focus, manufacturing not-withstanding. Keeping the cores for internal use only means that neither customers nor competitors were able to see the raw design specifications, and for a long time this has enabled Intel to keep key features, such as its branch predictors, away from all but the most prying eyes.

In a twist to the norm, Intel is now set to dissolve those walls keeping its x86 cores it itself.

First up is Intel’s Foundry Services, a second crack at offering external customers the ability to use Intel’s manufacturing facilities. Idle fabs are costly, and so with IFS, Intel wants to enable a revenue stream while at the time meeting global demand for semiconductors, especially as it pertains to local supply chain security and migrating the world’s semiconductor reliance away from Asia more into the USA and EU. IFS will stand as a separate business unit inside Intel.

As part of IFS, Intel will both offer raw manufacturing services, similar to a standard foundry like TSMC and Samsung, as well as its portfolio of IP to customers. This is a Big Deal™.  Intel will enable a fully vertical model with its IP portfolio, allowing customers to choose from x86 cores, graphics, media, display, AI, interconnect, fabric, packaging, and other critical foundational IP from other sources (such as Arm, RISC-V). The exact way in which customers will be able to license the IP will be announced in due course, but if Intel were to follow the Arm model, then Intel customers will get access to Intel’s 86 core designs.

Arm’s model is bidirectional: core IP and architecture IP. The first allows you to build an SoC with defined cores, while the latter allows you to build your own cores with the instruction set (like Apple does with Arm). When applied to Intel, with the core IP, a customer can build designs based on Intel’s x86 cores with their own or external interconnects, or in different configurations to Intel’s standard model that are more optimized for what that particular customer requires. At the minute Intel is set only to offer core IP licenses, not architecture IP licenses.

If we take this idea and extrapolate, we could very well see x86 cores combined with new memory controllers, active interposers with custom interconnects.

Intel has kind of done this before, although it was very much a walled garden. Intel offered foundry services almost 7 years ago, under then CEO Brian Krzanich, that allowed very select customers to build new SoC designs, with Intel's help, and only for very select pre-approved use cases. In that time, Intel's effort for a proper foundry business was, in Gelsinger's own words, 'weak'. The new model is set to be more open, as far as we're led to believe.

The only question becomes to what extent will Intel offer x86 cores. Will it be the latest cores designed internally, or would they be a couple of generations behind? Will those designs be offered on a variety of process nodes, or just on a singular process node? Would a customer be able to get a core IP license and build it at another fab? This is where the second part of the announcement comes in.

As part of today’s announcement, Intel has stated that it will be expanding its use of third-party foundry capacity. Pat Gelsinger highlighted that it would be leveraging its relationships with TSMC, GlobalFoundries, Samsung, and UMC, to enable the best manufacturing facilities for its leading edge product designs, from communications and connectivity to graphics and chiplets. This builds on the announcements made by former CEO Bob Swan last year in light of Intel's own troubles on its 7nm process. Today's announcements reaffirms Swan's messaging, given that at the time the word 'pragmatic' was used, so while this has probably been in the works in a while, it is good to get a clear confirmation. As part of this announcement, to quote:

‘Gelsinger said he expects Intel’s engagement with third-party foundries to grow and to include manufacturing for a range of modular tiles on advanced process technologies, including products at the core of Intel’s computing offerings for both client and data center segments beginning in 2023’

The key phrase here is ‘core of Intel’s compute offerings’. It could be interpreted in two ways: at the core of a CPU design is a CPU core, which would mean an x86 design unless Intel were to skew away from x86 (unlikely). The other alternative could be an IO chiplet, which is also a ‘core part’ of a compute offering. Paul Alcorn from Tom’s Hardware has confirmed from Intel that the key element here is ‘compute cores’, and although Intel hasn’t specifically said the ISA of those cores, we are set to believe that Intel does indeed mean x86.

This means that other foundries will have access to the floorplans of Intel’s x86 designs, which used to be a big no-no at Intel. Now in saying that, foundries often have strict NDA requirements that stop them sharing designs with customers, as you might expect, but it’s the fact that Intel is even letting another foundry build x86 cores that is the highlight of this announcement.

All-in-all, Pat Gelsinger is enabling a roadmap that allows Intel to pivot, and pivot hard. Steering the Intel behemoth is difficult at the best of times, however Pat’s arrival and enthusiasm has certainly made the company more comfortable in finding where its next generation of revenue is coming from.


Comments Locked


View All Comments

  • Samus - Wednesday, March 24, 2021 - link

    ZoZo, while you're post is spot on, decoding\emulating x86 instructions does not require a license. Hence Hyper-V and VMware can be given away free, and commercial products like Parallels is inexpensive. Even opensource products like DOSBox run x86 on ARM.

    The reason Rosetta 2 doesn't emulate\decode x86 instructions IRT isn't because of licensing, it's because, as you said, its slow and an old school way to go about it.
  • Klimax - Wednesday, March 24, 2021 - link

    Why? ARM and RISC-V are too decoded into microinstructions. You would just add extra step to pipeline for no benefit.

    If you want both of them on silicon and have x86 licence, just add a decoder or two for common case + microcode for rest.
  • Klimax - Wednesday, March 24, 2021 - link

    (Repost, because I sent it originally to wrong comment... and also fixed missing word)
    There is no second step (And especially not RISC-CISC one). CISC instructions are decoded directly to microinstructions that are RISC-like.

    Also x86 is pretty simple unlike other long-dead CISC sets. (It helps, that a lot of mostly unused instructions like BCD ones, could be moved to microcode)
  • Klimax - Wednesday, March 24, 2021 - link

    There is second step (And especially not RISC-CISC one). CISC instructions are decoded directly to microinstructions that are RISC-like.

    Also x86 is pretty simple unlike other long-dead CISC sets. (It helps, that a lot of mostly unused instructions like BCD ones, could be moved to microcode)
  • Klimax - Wednesday, March 24, 2021 - link

    Crap, posted under wrong comment...
  • zmatt - Wednesday, March 24, 2021 - link

    Funny you claim x86 is a garbage ISA stuck in the 80's when your reasoning is just as if not more stuck in the 80's.

    As others have pointed out, your complaints haven't been relevant or factual for a very long time. Since Pentium Pro actually.
  • peevee - Tuesday, March 30, 2021 - link

    Any modern architecture is SUPER-CISC by 1980s standards.

    Any difference in the complexity of the decoders between, say, x64 and ARM V8.2 is trivial (completely insignificant) compared to everything else the chips have to do.
  • yeeeeman - Thursday, March 25, 2021 - link

    I think the situation, financially especially, is quite bad on their foundry business so they need these extreme measures to stay alive. Pat might be a good engineer and ceo but money is money and the situation with intel fabs being sort of stuck for 5 years is desperate. If it were any other fab they would be shut down by now.
  • Evo01 - Tuesday, March 23, 2021 - link

    So how soon do we see AMD silicon using an Intel fab?
  • TristanSDX - Tuesday, March 23, 2021 - link

    probably never

Log in

Don't have an account? Sign up now