New ISA & ALUs: An Extremely Wide Architecture

As mentioned, the ALU architecture as well as ISA of the new A-Series is fundamentally different to past Imagination GPUs, and in fact is very different from any other publicly disclosed design.

The key characteristic of the new ALU design is the fact that it’s now significantly wider than what was employed on the Rogue and Furian architectures, going to up a width of 128 execution units per cluster.

For context, the Rogue architecture used 32 thread wide wavefronts, but a single SIMD was only 16 slots wide. As a result, Rogue required two cycles to completely execute a 32-wide wavefront. This was physically widened to 32-wide SIMDs in the 8XT Furian series, executing a 32-wide wavefront in a single cycle, and was again increased to 40-wide SIMDs in the 9XTP series.

In terms of competing architectures, NVIDIA’s desktop GPUs have been 32-wide for several generations now, while AMD more recently moved from a 4x16 ALU configuration with a 64-wide wavefront to native 32-wide SIMDs and waves (with the backwards compatibility option to cluster together two ALU clusters/CUs for a 64-wide wavefront).

More relevant to Imagination’s mobile market, Arm’s recent GPU releases also have increased the width of their SIMDs, with the data paths increasing from 4 units in the G72, to 2x4 units in the G76 (8-wide wave / warp), to finally a bigger more contemporary 16-wide design with matching wavefront in the upcoming Mali-G77.

So immediately one might see Imagination’s new A-Series GPU significantly standing out from the crowd in terms of its core ALU architecture, having the widest SIMD design that we know of.

All of that said, we're a bit surprised to see Imagination use such a wide design. The problem with very wide SIMD designs is that you have to bundle together a very large number of threads in order to keep all of the hardware's execution units busy. To solve this conundrum, a key design change of the A-Series is the vast simplification of the ISA and the ALUs themselves.

Compared to the Rogue architecture as depicted in the slides, the new A-Series simplifies a execution unit from two Multiply-Add (MADD) units to only a single MADD unit. This change was actually effected in the Series-8 and Series-9 Furian architectures, however those designs still kept a secondary MUL unit alongside the MADD, which the A-Series now also does without.

The slide’s depiction of three arrows going into the MADD unit represents the three register sources for an operation, two for the multiply, and one for the addition. This is a change and an additional multiply register source compared to the Furian architecture’s MADD unit ISA.

In essence, Imagination has doubled-down on the transition from an Instruction Level Parallelism (ILP) oriented design to maximizing Thread Level Parallelism(TLP). In this respect it's quite similar to what AMD did with their GCN architecture early this decade, where they went from an ILP-heavy design to an architecture almost entirely bound by TLP.

The shift to “massive” TLP along with the much higher ALU utilization due to the simplified instructions is said to have enormously improved the density of the individual ALUs, with “massive” increases in performance/mm². Naturally, reduced area as well as elimination of redundant transistors also brings with itself an increase in power efficiency.

The next graphic describes the data and execution flow in the shader processor.

Things start off with a data master which kicks off work based on command queues in the memory. The 3D data master here also handles other fixed-function pre-processing, which will trigger execution of per-tile hidden surface removal and workload generation for the shader programs. The GPU here has a notion of triangle merging which groups them together into tasks in order to get better utilization of the ALUs and able to fill the 128 slots of the wavefront.

The PDS (Programmable Data Sequencer) is an allocator for resources and manager. It reserves register space for workloads and manages tasks as they’re being allocated to thread slots. The PDS is able to prefetch/preload data to local memory for upcoming threads, upon availability of the data of a thread, this becomes an active slot and is dispatched and decoded to the execution units by the instruction scheduler and decoder.

Besides the primary ALU pipeline we described earlier, there’s a secondary ALU as well. First off, a clarification on the primary ALUs is that we also find a separate execution unit for integer and bitwise operations. These units, while separate in their execution, do share the same data paths with the floating-point units, so it’s only ever possible to use one or the other. These integer units are what enable the A-Series to have high AI compute capabilities, having quad-rate INT8 throughput. In a sense, this is very similar to Arm’s NN abilities on the G76 and G77 for integer dot-product instructions, although Imagination doesn’t go into much detail on what exactly is possible.

The secondary pipeline runs at quarter rate speed, thus executing 32 threads per cycle in parallel. Here we find the more complex instructions which are more optimally executed on dedicated units, such as transcendentals, varying operations and iterators, data conversions, data moving ops as well as atomic operations.

A New Architecture To Bring IMG's Return? Fixed Function Changes & Scalability
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  • RaduR - Tuesday, December 3, 2019 - link

    Andrei Frumusanu was working for them . So maybe he has more info on how this is going to develop .

    The only downside for ImgTec is that they are depending on CPU vendors. So if they cannot sell this design to anyone ....

    They tried with MIPS but for whatever reason MIPS lost traction . Most probably they wer eunable to sell the design .

    Please understand that ImgTec is a very very small company that is fighting in fact with ARM . They are not Mediatek nor Qualcomm . In this market there is a lot of completion.

    We have : Vivante in the lowend. Broad iMM has Videocore , ARM sells MALI together with Cortex designs. So how can ImgTec survive ?

    I see the only option would have been MIPS + PowerVR or to be taken over by a company like Mediatek . I am still wondering why Intel did not buy them for the cheap or Mediatek .
  • Andrei Frumusanu - Tuesday, December 3, 2019 - link

    I left back in November 2017 and avoided coverage till now due to any conflict of interest. The A-Series is beyond the horizon of future knowledge I had from back then so it was new to me, I don't have any more info beyond my estimates that I wrote.

    Vivante is effectively dead and so is the Videocore lineup, the best case scenario here is a 50/50 split with Arm. The CPU I thing I don't think it's a limitation as long as the GPU in fact does deliver on competitive PPA.
  • ZolaIII - Tuesday, December 3, 2019 - link

    I wouldn't exactly say Unisoc adoption of it would have a small impact (tho they are still recovering from bad Intel's influence) nor would I write of possibility of HiSilicone adoption (more so as they are keen on ARM for US ban compliance & after all Chinese IPO owns Imagination now). Actually this is going so far right now that RISC V foundation is moving out of US to neutral grounds to ensure that same fate that struck the ARM cannot happen to them.
  • vladx - Wednesday, December 4, 2019 - link

    ARM is also planning to move remaining R&D centers from US to avoid any chance of US ban in the future.
  • vladx - Wednesday, December 4, 2019 - link

    Did anyone use Vivante designs in their SoCs in the past 3 years or so?
  • GruenSein - Tuesday, December 3, 2019 - link

    Uncertainties about ImgTech's claims and promises aside, I am wondering who is supposed to be the customer.
    Apple is developing their own GPUs now.
    Samsung is going with AMD's RDNA.
    Qualcomm has their Adreno GPU.
    HiSilicon is using ARM's Mali.
    I fear that this will be a very niche product unless it absolutely dominates all other solutions.
  • Raqia - Tuesday, December 3, 2019 - link

    If they remain independent, I think it'll be anyone who wants something better than Mali or Intel that don't have their own GPU or haven't partnered up, so with Intel also designing their own GPU cores I guess the main customer would be Mediatek, and a handful of other even smaller licensees like Broadcom for things like its Raspberry Pi SoC, NXP, STM etc.

    When compared to CPU designs which are becoming increasingly commoditized by ARM's freely licensed and very good SIP cores (with only nVidia and Apple doing their own custom cores in volume going forward), efficient GPU cores continue to be highly specialized and a well sought after technology. Imagination would also be a layup acquisition for any company besides Apple, AMD, or Qualcomm, so I could Intel, Samsung or ARM buying them in the future.
  • Raqia - Tuesday, December 3, 2019 - link

    Also Marvell and other TV / automakers.
  • name99 - Tuesday, December 3, 2019 - link

    Amazon made a big deal about GPU support and AI inference in their Graviton 2 announcement. They might be an unexpected client?
    (For that to work, however, IMG might have to be more flexible in terms of being willing to scale up/drop functionality to match AMZ's needs. They were apparently unwilling to be that flexible for Apple... But hey, near death experience can sometimes teach...)
  • mode_13h - Wednesday, December 4, 2019 - link

    I'm sure Amazon is just talking about Nvidia and possibly AMD. Nvidia is officially supporting their software stack on ARM, and AMD's is opensource and could be recompiled for ARM (hey, it works on POWER!).

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