Going For Power: Is 105W TDP Accurate?

For regular readers, we have covered the discrepancy in how different companies ascribe the Thermal Design Power to their product lines:

While Intel’s TDP represents the internal power measured for long and sustained high performance (also motherboard dependent), AMD’s metric is more akin to actual thermal cooling requirements for a given cooler rating. That being said, the power consumption of AMD’s first and second generation Ryzen processors has often been parallel to the TDP rating on the box, with the CPU levelling out to the TDP value as we load up the cores with a high energy workload.

For example, here’s our 16-core 1950X data. The Threadripper 1950X is a 180 W chip, and we saw the cores take a total of 134 W.

Here’s our Ryzen 7 2700X data.

This 105 W TDP processor was only recording 86W across the cores at full load.

It’s worth noting that our data is primarily to do with the total power consumed by the cores. There are other power factors at play, such as the Infinity Fabric, the DRAM controller, the PCIe controller, and any other IO, which might add up to the power of the overall package. The maximum power available to a processor should be the package, of which the cores take up most of the sum.

With Ryzen 3000 and Zen 2, AMD’s attachment to TDP was not as clinical as its first two generations of hardware. In our Ryzen 7 3700X review, with the 12-core processor, we saw this:

The Ryzen 7 3700X is a 65 W processor, and yet we can see that the cores total up to 74 W by themselves, with the rest of the chip taking another 16W or so, totalling 90 W for the whole chip. This aligns with AMD's 'PPT', the maximum power that can be supplied to the socket, which is around 88W. This is perhaps indicative of two things: firstly, that Intel’s turbo policy was creating 95 W TDP chips that consumed 160W in turbo modes and AMD believed it had headroom, or pushing these new chips to the edge required a little more power.

With the Ryzen 9 3900X, with 12 cores, we saw the same thing again.

Despite this being a 105 W TDP chip, the cores at full load saw 122 W peak, with the rest of the chip getting ~24 W, making for an overall 146 W power draw (as measured by the processor internally). PPT for this chip is meant to be 142W.

This shows that Zen 2 has a different strategy to the previous Zen chips when it comes to how AMD is mixing the difference between TDP and PPT. If we saw the same thing with the Ryzen 9 3950X, then it pretty much confirms the hypothesis.

At its peak, the 3950X draws 137 W for the cores when 10 cores are loaded. The chip as a whole hits ~144-145W at that level, well above the 105 W TDP rating on the box and bang on the 142W PPT. This is partly why AMD is recommending a large liquid cooler for this chip. Under Intel’s definition, the TDP rating is a guarantee for the power consumption at base frequency, although most Intel processors can go above that frequency and stay within the power. We might be seeing something similar here with AMD now.

It is worth noticing that when up to two cores are loaded, we see each core getting around 18 W of power, but when all the cores are loaded, we are seeing between 6.9 W and 7.6 W. This is compared to the 12-core 3900X, which has about 17.5 W per core initially, and falls down to 10 W per core. AMD is trying to get a higher single core frequency from the 16-core hardware, so by giving more power when a single core is loaded, this might help.

One other thing to note is where the peak power is observed. We kind of already saw this on the Ryzen 9 3900X in that review, where the peak power of the chip happened when 10 cores were loaded, not the full 12 cores. The difference between the two was minimal, but we’re seeing this on a larger scale with the Ryzen 9 3950X.

When looking at both the cores-only power and the CPU total power, we get a peak with this processor when 10 cores are loaded. This would indicate a 3+2+3+2 mix on the CCXes, which is perhaps an inflection point when current densities start getting much higher and per-core power has to be reduced to ensure everything is still working optimally. The power differential between 10-core use and 16-core use is almost 20W, so users that don’t always use all the cores all the time might exhibit good per-thread performance up to 10 core workloads.

Speaking of frequencies, this has been a touchy topic of late. We have seen with recent news and testing that some users are not observing peak single core frequencies of their Ryzen processors. As we explained in our deep dive of the issue, part of it comes down to the fact that AMD’s turbo policies for Zen 2 are different to Intel: only one core in a set is likely to turbo up to the highest frequency, whereas Intel’s Turbo Boost 2.0 mandates that all cores should hit peak turbo. The other part of it is the testing methodology, but also the fact that the ACPI standards at the OS level can indicate a turbo on a shorter time scale than software can record, ultimately giving users a smeared out version of that turbo value. Then there are other things, like BIOS versions and Windows power plans.

With our Ryzen 9 3950X, the on-the-box single core turbo frequency is listed as 4.7 GHz. We tested using the ASRock X570 Taichi motherboard, a very high-end product, using Windows 10 v1909 on AGESA 1004B, on both the High Performance (HP) power plan and the Ryzen High Performance (RHP) power plan. For peak single core frequencies, we were able to see 4525 MHz on the HP plan, and 4650 MHz on the RHP plan. This latter value is pretty much on the button for the on-the-box turbo value (I’m sure some people will disagree about those 50 MHz).

These values on the RHP power plan were very instantaneous, as when we put a consistent single thread load on the core, the frequencies very quickly came down.

On the Ryzen High Performance power plan, our sustained single core frequency dropped to 4450 MHz. In these tests, we use an affinity mask to limit how many cores are active while we run POV-Ray, and take the reading about 30 seconds into the benchmark, which allows a core to experience a form of heat soak and reach a reliable current density. This is also how we reached the 18 W per core value for 1-2 core loading in the graphs above, indicating that in order to get a sustained 4.7 GHz single core frequency, AMD would need to drive around 21-24W to the core in order to get that value. It is very likely that the CPU can hit those high numbers, for microseconds at a time, as per the ACPI/CPPC2 stack, but for any user doing per-second or per 100ms monitoring, they’re not likely to see it.

Within this frequency graph though, we can see that the frequency beyond 3 cores has segments. Between 3 cores and 8 cores loaded, we get 4225 MHz to 4125 MHz (100 MHz range), and even at all cores loaded, we’re seeing 3875 MHz, well above the 3500 MHz base frequency listed on the box.

In our full review, we are testing the Ryzen 9 3950X on both the HP and RHP power plans.

The AMD Ryzen 9 3950X Review: Mainstream Turns 16 Test Bed and Setup


View All Comments

  • Spunjji - Thursday, November 14, 2019 - link

    In theory it might be. In practice, they're still only able to make mobile CPUs with 4 cores or less on it. Reply
  • Orange_Swan - Thursday, November 14, 2019 - link

    Nah, they've got at least one 6core/12thread, 15/25w mobile CPU, the Core i7-10710U Reply
  • Retycint - Thursday, November 14, 2019 - link

    That's 14nm. All Intel's 10nm processors so far have been limited to 4 core Ice Lake U processors Reply
  • Smartcom5 - Friday, November 15, 2019 - link

    If, and that's the whole issue here since a while now, IF Intel's 10nm would be working after all.Sure enough, that's a requirement which still needs to be fulfilled yet. The best process – no matter how oh so advanced it is going to be (on paper) – is worth exactly no·thing if it ain't working. Then, even a (on paper inferior) node is superior, since it at least meets a crucial condition; It's working (already).

    Thus, it isn't anymore. They relaxed it quite a bit in 2017 to make it work, that's it.

    Intel's actual 10nm which spawned Ice Lake isn't the same as it was before, that's why it's coined 10nm+. It's actually less dense than Intel's initial and original-10nm which brought Cannonlake – density was toned down, it's more like ~12nm now.

    Interestingly TSMC on its current 7nm N7-process already archives virtually the very same density Intel failed to archive on their initial 10nm-process back then – while their current 10nm+, which has a toned-down density from initially 2.7× down to only some 2.0—2.2× (depending on what sources you're willing to trust), is rumoured to rather equal some 12nm-ish alike process instead of being closer to any initial Intel'ian 10nm.

    So while Intel somehow failed, others archived the same density-goals Intel was trying to do for years, to no greater avail – and those others where even on track as scheduled most of the time. Thus, TSMC already fabs on a process which would equal Intel's very initial 10nm-process, which never really saw any greater light of day, bar that known i3-8121U (well, and that m3-8114Y of course, ... you don't know a thing about it, okay?).
  • GraveNoX - Thursday, November 14, 2019 - link

    Yes, they will launch 10nm and 7nm on the same day so you have the freedom to choose which version of the chip you want. Reply
  • Oliseo - Thursday, November 14, 2019 - link

    "Based on my imagination Intel will destroy AMD" Reply
  • Santoval - Thursday, November 14, 2019 - link

    It is meaningless to compare Intel's 7nm parts, which will be released in 2021 assuming NO delays (thus more realistically in 2022+) with AMD's current 7nm parts. If you were going for a "node for node" comparison that is even more meaningless, because Intel's 7nm node will be equivalent to TSMC's 4nm or 5nm node in transistor density (I have read numbers predicting ~185 million transistors per mm^2 for TSMC's 5nm node and ~200nm MTr/mm^2 for Intel's 7nm node). TSMC's 5nm node will almost certainly be released before Intel's 7nm node by the way.

    Regarding Intel's 10nm node parts, while Sunny Cove appears to have a higher IPC than Zen 2 Intel's 10nm parts suffer from much lower clocks which have eaten away all or almost all the IPC gains. This is why Intel have not announced an Ice Lake-S/H release and intend to replace it with Comet Lake-S/H. S/H parts require high clocks, which cannot be provided by Intel's 10nm+ node due to very low yields at high clocks. Only low power Ice Lake-U/Y parts and Ice Lake Xeons will be released. Why? Because these parts have lower clocks.

    More or less the same thing might be repeated with Tiger Lake, in 2H 2020, which would mean that Intel are not very confident of fixing their 10nm node issues even with their 10nm++ node variant. It is rumored that there will be no Tiger Lake-S/H parts and Rocket Lake-S/H will take their place. What's Rocket Lake? A 14nm+++++++ part but with a new μarch (Sunny or Willow Cove cores and a Gen11 or Gen12 iGPU).
  • Santoval - Thursday, November 14, 2019 - link

    edit : "and ~200 MTr/mm^2 for Intel's 7nm node". Reply
  • Targon - Thursday, November 14, 2019 - link

    Didn't TSMC start 5nm risk production a month or so ago? Reply
  • John_M - Monday, November 25, 2019 - link

    Yes, they did. Reply

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