As is custom by now every year, we look forward to TechInsights teardown of the latest new mobile SoCs. This time around we’re delighted to see a new die shot of the new Apple A12, the first commercially available 7nm piece of silicon.

While TechInsights posted their take on the block identification and labelling, found on their iPhone XS teardown blog post, I do think it missed the mark in terms of the CPU complexes. Therefore I did my own analysis and took the liberty of adding a bit more visibility and custom labelling of the die shot:

AnandTech modified TechInsights Apple A12 Die Shot

We see two big cores in the centre-left next to what TechInsights labelled as the NPU. The cores have seen some larger restructuring and this is most obvious in the doubling of the SRAM macros of the L1 data caches which I’ve confirmed to be tested at 128KB – twice the size over last year’s 64KB of the A11 cores. We also similarly see a doubling of the L1 instruction cache macro cells – which also likely hints that this has also seen a doubling to up to 128KB.

The CPU complex cache remains largely the same size as on the A11, with the only difference being a re-layout in a more clean manner. I have big expectations of this part of the new microarchitecture, something we’ll dwell more deeply in our upcoming full review.

The small cores are found in the bottom centre – four of them surrounding their L2 cache logic and memory banks.

The system cache block of the A12 has seen a very major redesign, as opposed to the A11 and prior SoCs, we see a very obvious slice separation into four units. Ironically, at least on the die, this looks a lot more to what we’ve seen in the Snapdragon 845 system cache block.

On the GPU side of things, it’s very clear that this is very much a direct successor to last year’s GPU as the blocks structure in the common shared logic and inside a GPU core is pretty much in line with what we’ve seen last year. We’ll be dwelling into GPU IP discussions more in our upcoming review.

We break down the individual IP block sizes alongside the total die size in the following table:

Die Block Comparison (mm²)

Process Node
Apple A12

Apple A11

Total Die 83.27 87.66
Big Core 2.07 2.68
Small Core 0.43 0.53
CPU Complex (incl. cores) 11.90 14.48
GPU 14.88 15.28
GPU Core 3.23 4.43

In terms of determining the actual process node shrink, the closest valid apples-to-apples comparison we can make are in the small cores and an individual GPU core. Here we see a shrink from 0.53mm² to 0.43mm² in the small CPU cores – representing a 23% reduction. On the GPU core side we see a more significant 37% reduction down from 4.43mm² to 3.23mm².

All in all Apple is again at the leading edge of manufacturing technology and the new A12 showcases some really interesting changes in its silicon blocks. Stay tuned for our full iPhone XS and XS Max review in the near term future.

Source: TechInsights



View All Comments

  • eastcoast_pete - Tuesday, September 25, 2018 - link

    Thanks Andrei! I look forward to your full review (deep dive? that'd be great) of the A12. I hadn't realized that the A12's NPU would be that big; the NPUs seem to take up as much area as the 4 big cores, if not more. I am curious to learn how iOS and various Apple apps put all that silicon dedicated to the NPU to (good?) use.
    Showing my ignorance here: Is Apple combining DSP functions and neuronal processing and are calling it their NPU, or is there a separate DSP block on the A12 that is simply not labelled as such here?
  • Zoolook - Wednesday, September 26, 2018 - link

    The A12 has 2 big cores, not 4. Reply
  • eastcoast_pete - Wednesday, September 26, 2018 - link

    Yes, typo. Still the NPU area is as large as or larger than the two vortex cores. Also, any idea about where the DSP circuitry lives on the A12? Are they taken care of by the "NPU" blocks, or just not identified on the die shot? Reply
  • Andrei Frumusanu - Wednesday, September 26, 2018 - link

    Or there simply isn't one. Reply

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